ABOUT PROJECT This company is a provider of semiconductor technology solutions specializing in reusable digital IP cores for ASIC and FPGA designs. Its portfolio includes processor architectures (such as RISC-V), high-performance data compression engines, standards-based industrial and networking interfaces (including CAN, TSN, Ethernet, MIPI, PCI/AMBA), peripheral modules, and comprehensive SoC security components — from cryptographic primitives to secure boot implementations.
Operating since the early 1990s with offices across North America and Europe, the company adheres to ISO 9001:2015 quality standards and offers flexible licensing models with direct developer support. Its customers in automotive, industrial, defense, and IoT sectors rely on these IP solutions to accelerate development cycles, meet functional safety requirements (e.g., ISO 26262), and enable high-throughput data processing — with its technologies integrated into billions of devices worldwide.
PROJECT TECH STACK С, C++, FPGA TEAM COMPOSITION around 20 people in general. PROJECT STAGE live product. REQUIREMENTS * 5+ years of professional experience in digital hardware design, with a focus on ASIC projects. * Background in Verilog and SystemVerilog for RTL design and implementation. * Hands-on experience with simulation, synthesis, linting, and coverage tools used in digital design flows. * Solid grasp of hardware verification methodologies and adherence to industry-standard design best practices. * Demonstrated ability to design and verify IP cores, ideally with experience at an IP product company. * Hands-on experience with simulation tools, synthesis tools, lint checking, and coverage analysis.
Nice to have * Safety design complying with ISO 26262. * An expertise with FPGA is preferable, but not a hard requirement.
RESPONSIBILITIES * Design, implement, and verify digital hardware architectures (ASIC and/or FPGA), focusing on IP core development. * Write and maintain synthesizable RTL using Verilog/SystemVerilog. * Perform simulation, synthesis, linting, and coverage analysis using industry-standard tools. * Participate in technical reviews of designs, code, and documentation. * Maintain high standards of code quality and documentation.
